1. Field of the Invention
The present invention generally relates to memory architecture, in particular, to memory architecture with error-correcting code (ECC) function.
2. Description of Related Art
As a basic structure for a memory apparatus, it includes memory array and various peripheral circuit to access the cells of the memory array. The memory array is the core part to store the data. However, the data stored in the memory array may have error, in which the data may have one bit flipped from what is originally written. To correct the error bit in the memory array, the ECC circuit is used when data is written-to or read-from the memory array, to detect the error bit based on parity check and then correct the error bit.
Various algorithms can be taken for the ECC circuit. However, in one of the algorithms based on checking the even number of “1” in the data set, such as 32 bits, the ECC circuit may change the initial data, when the cells of the memory array by default is “1”, such as FFFF-FFFF, in which one word is composed of four bits and one F represents four bits of “1111”.
The ECC causes the error for accessing the data of FFFF-FFFF is following. The ECC circuit in 32-bit I/O with 6 correction code (bit) is taken as an example. When the data of FFFF-FFFF in 32 bits is input to the ECC circuit for encryption, then the output after ECC encryption would be 38 bits in total and the value is 3F-FFFF-FFD8, which is combined with six bits of “01 1000” and then stored into the memory array. After then, the data of 3F-FFFF-FFD8 is read out from the memory array. Before the actual output, the data of 3F-FFFF-FFD8 enter the ECC circuit for decryption to remove the ECC and get the output data FFFF-FFFF in 32 bits. However, when a memory is just out of factory, the data read out from the memory array would be 3F-FFFF-FFFF but not 3F-FFFF-FFD8. It will cause the first-time read fail. This situation does particularly exist for the initial data of FFFF-FFFF.
How to effectively solve the issue above should be taken into account for designing the ECC circuit.